General Information

O-RAN Distributed Unit Low Layers (ODULOWO-DU LOW)

PTL

Zhimin@Farias YuanLuis

Summary

Focus on L1 functional blocks development according to O-RAN WGs and 3GPP specification.

Project

o-du, o-du/l2, o-du/phy, o-du/sim

Weekly Meetings

Quick Explore

Below link will help you have a quick explore

View current code contribution through web:

https://gerrit.o-ran-sc.org/r/gitweb?p=o-du/phy.git;a=tree

Explore the Documentation:

https://docs.o-ran-sc.org/en/latest/projects.html#o-ran-distributed-unit-low-layers-odulow

• The Bronze release was kicked off,  find the new features in page

General Introduction

The project include two parts contributions

part 1: O-RAN FH interface lib, FAPI TM lib and WLS lib. O-RAN FH interface lib which follow O-RAN WG4 interface to implement O-RAN radio interface from DU end, WLS and FAPI TM is the interface implementation between O-DU low and O-DU High. 

part 2: L1 binary along with one set of uses cases which were performed with test MAC application.

With above parts, below O-RAN network functions can be verified with different data flow to meet your different purpose:

• data flow 1: FH lib UT, FH lib had it's own test framework, which includes one test app to simulator the l1 and test RU to simulator the RU, between test app and test RU, data was exchanged follow O-RAN WG4 C/U/S plane spec. there are multiple use cases that are defined with variant numerology and bandwidth.   

• data flow 2: RRU interface UT, the test app and FH lib can also be used to test real RRU with simulated L1 data connecting to SA/SG  

• data flow 3: testmac timer: L1 binary and test mac timer mode was provided to verify the FAPI interface with full L1 pipeline/functionalities , it also can be used to verify the HW platform supportive of the L1 SW with proper capabilities.  

• data flow 4: testmac radio:  With full L1 pipeline integrated FH lib, this data flow can be used to verify the RRU with full L1 pipeline. 

• data flow 5: E2E open source: together with other open source project in OSC, E2E data flow can be verified, please go to Integration and Testing and Requirements and Software Architecture Committee Home for detail E2E integration current status and plan.

Image Added 

below picture shows the architecture and the interface of O-DU low. this project mainly focus on the open interface development so far, three interfaces will be involved to interact with L1.

Image Added

Interfaces:

• Interface between L1 and Front haul, it will adopt the WG4 specification for the CUS plane communication. 

• Interface between O-DU Low and O-DU High, FAPI interface will be adopt according to WG8 AAL specification.

• Interface between O-DU Low and accelerator, it's the hot topic in WG6 now,  DPDK BBDev was adopted as current design, it follow the O-RAN WG6 specification.

Weekly meeting:

Now it's mainly ad-hoc meeting, record as below:

Intel: Zhimin

NTUST: Ray, Prof. Chung-An Shen, Prof. Chin-Ya Huang

Action Items:

- Zhimin provide

    - Share the figure for testing architecture

    - A list of job items to be done for DPDK xRAN

    - Provide O-RAN FH architecture document for Prof. Shen for reference. Ray's team may help to convert it to RST format

    - Provide the model number for O-RU simulator

- Prof. Shen, check the available resource and determine the job

- Ray: 

    - AAEON can only provide one server for O-CU+O-DU.

    - Write a mail to Viavi for testing equipment

Intel: Zhimin

NTUST: Ray, Prof. 

AAeon: SamChen; FredyHsu; EyckNi; 

Action Items:

1. Zhimin will provide

- Model number of FPGA card such that Ray can invite the company to join this project

- A list of job items for DPDK xRAN. Ray can pass the information to his colleague, Prof. Shen, for evaluation

 2. Sam has to check the supporting of NIC (and confirm it with Zhimin) and IEEE 1588