D Feature Scope: . 1. Achieve UL and DL data flow using FDD mode on 20 MHz Bandwidth, Numerology = 0 2.Support for static TDD mode with pattern “DDDDDDDSUU” on 100 MHz Bandwidth, Numerology = 1 - Evolve scheduler to support UL and DL scheduling of signaling and data messages on single spectrum in TDD mode
- Expand scheduler to support Frame structure according to numerology = 1
- Updates to cell broadcast for TDD and numerology = 1
3.Development activity for Closed Loop Automation use-case - Support for cell stop and restart within O-DU High layers
- Support for cell stop and restart towards O-DU Low
- F1AP Enhancements towards O-CU indicating cell stop and restart
4.Integration - Integration with O-DU Low in Radio mode
- Integration with CU
5.End to end testing support (O-RU<->O-DU-LOW<->O-DU-HIGH<->RSYS CU<->Viavi 5G Core ) 6.O1 enhancements - by HCL - Re-structure O1 module to run as a thread in ODU-High
- CM Support - IP and Port configuration for DU, CU stub and RIC stub via Netconf interface
- Support for Closed Loop Automation use-case
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Status: Updated: 2nd June 2021 JIRA: Epics Status below: - https://jira.o-ran-sc.org/browse/ODUHIGH-184 - Done
- As an O-DU L2 developer, I want to implement single UE DL data path and bench-marking
- https://jira.o-ran-sc.org/browse/ODUHIGH-185 - Done
- As an O-DU L2 developer, I want to implement single UE UL data path and bench-marking
- https://jira.o-ran-sc.org/browse/ODUHIGH-186 - WIP
- As an O-DU L2 developer, I want to add support for 64QAM modulation scheme in DL
- Basic code changes complete. Testing in progress for data path
- https://jira.o-ran-sc.org/browse/ODUHIGH-187 - WIP
- As an O-DU L2 developer, I want to add support for 16QAM modulation scheme in UL
- Basic code changes complete. Testing to be done for data path
- https://jira.o-ran-sc.org/browse/ODUHIGH-264 - WIP
- As an O-DU L2 developer, I want to add support for Mu1
- Code changes at DU APP completed.
- Resource allocation for SSB to msg5 completed
- Code changes for UE registration flow in progress
- Updates to k0, k1, k2 in progress
- https://jira.o-ran-sc.org/browse/ODUHIGH-265 - WIP
- As an O-DU L2 developer, I want to add support for 100 MHz Bandwidth
- Code changes at DU APP completed.
- Resource allocation for SSB to msg5 completed
- Code changes for UE registration flow in progress
- Updates to k0, k1, k2 in progress
- https://jira.o-ran-sc.org/browse/ODUHIGH-266 - WIP
- As an O-DU L2 developer, I want to add support for TDD mode
- Code changes at DU APP completed.
- Resource allocation for SSB to msg5 completed
- Code changes for UE registration flow in progress
- Updates to k0, k1, k2 in progress
- https://jira.o-ran-sc.org/browse/ODUHIGH-299 - WIP
- As an O-DU L2 developer, I want to develop O-DU High Layers to support Closed Loop Automation Use-case
- https://jira.o-ran-sc.org/browse/ODUHIGH-267 - WIP
- As an O-DU L2 developer, I want to integrate O-DU High with O-DU Low in Radio Mode
- SSB transmission successful
- Debugging issue with Sib1 transmission , PDCCH is received but no PDSCH seen at O-DU low.
- Awaiting inputs from Intel
- https://jira.o-ran-sc.org/browse/ODUHIGH-268 - WIP
- As an O-DU L2 developer, I want to integrate O-DU High with O-CU
- Using Radisys commercial CU as a test fixture
- New VM to be configured as per H/W and S/W requirements of Radisys CU
- https://jira.o-ran-sc.org/browse/ODUHIGH-269 - WIP
- As an O-DU L2 developer, I want to support End to End testing scenarios
- Testing of broadcast messages at O-RU emulator set to begin
- Viavi confirmed receiving at O-RU. Needs verification from UE sim.
Updates from HCL: Dependency/Blockers: - O1 configuration for day-1 shall need to be completed to start with CLA. However basic configuration e.g. cell state/operational state/admin state shall be supported initially. Use admin state as unlocked to validate the RU link failure.
- Server(VM) configuration (H/W and S/W) to mount Radisys CU as a test fixture.
- Unable to use valgrind with Intel libraries. Debugging must be carried out with Alternate methods.
- SIB1 PDSCH reached L1 but cannot be observed in logs. Awaiting response from Intel.
- Viavi to confirm successful decoding of SSB at UE sim (TM500).
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